Focusing to deliver:
- Complex, high performance SoC including Analog Front End and
   High Speed I/O interfaces
- Low-power Analog Mixed-Signal ASIC
- RF ASIC
- Pure Digital ASIC

We successfully deliver ASIC / Systems on Chip solutions combining RISC processors, with multimillion gate hierarchical designs, high speed interfaces and extended set of IPs including customizable analog mix-signal blocks.

We offer leading-edge deep submicron technologies including 45nm, 65nm, 90nm, .13um and .18µm, and standard .25µm, .35um & .65um process technology.

Variety of products for optimized technical and commercial solutions for each individual application:

Standard cells

•	Libraries to meet each customer targets for density, power or performance
•	e.g Smallest die size, lowest power consumption or highest speed performance.
•	Lowest Cost Part price.
•	Highest complexity and special design styles.
•	Highest integration levels - most efficient for IPs, custom digital and analog mix-signal blocks.

Embedded arrays

•	Combines the advantages of Standard Cell (on-chip SRAM / Analog customized
•	Blocks and Gate Array (fast turn around time) ASICs.
•	Medium to high complexity.
•	Mid-range volume.

Gate Array

•	Offers quick time to market at the lowest development cost.
•	Enables users with low volume requirements.
•	The design flow is relatively simple as only the metallization layers are used for customization.
•	Advantages compared to low-mid FPGAs in terms of cost, performance and power-efficiency

Structured ASIC

•	Application starting with small volume.
•	High performance with low development cost.
•	Offers quick time to market due to standardized design flow.
•	Suitable as alternative for high-end FPGA.

Our ASIC SOC solutions integrate wide variety of IPs, supporting CPU cores, High-speed and Standard I/Os, Peripherals and Standard Bus Controller, Memories, Analog Mixed-Signal and Media Access. This is done with proven Design Methodology and Support through our local design house center and via our suppliers support. Early to market through FPGA prototyping services for SOC digital equivalent or through Multi project wafer (MPW) program for custom analog mix-signal design, or high performance IP block. Extensive range of packaging options from industry standard QFP and a wide variety of Fine pitch and Flip Chip BGA configurations, to enable customers to achieve the high level of integration and performance with low thermal resistance and relation to price sensitivity.

Offering most flexible engagement model

•	Full turn key ASIC / SOC design and manufacturing services. (Spec to production)
•	RTL / Netlist to production.
•	Foundry – GDSII and Test Program delivering.
•	Choice of supply partners in terms of ASIC / Foundry, IPs, EDA.

Please contact us for more information about our services, offered processes and technologies.